Analytic modeling of breakdown voltage shift in the CMOS buried multiple junction detector

Thais Luana Vidal de Negreiros da Silva , Pascal Kleimann (1) , Patrick Pittet (2) , Guo-Neng Lu (2)

1 INL - LOCI - INL - Lab-On-Chip et Instrumentation
2 INL - CSH - INL - Conception de Systèmes Hétérogènes

Domaines: Electronique

Thais Luana Vidal de Negreiros da Silva, Pascal Kleimann, Patrick Pittet, Guo-Neng Lu. Analytic modeling of breakdown voltage shift in the CMOS buried multiple junction detector. Solid-State Electronics, 2020, 164, pp.107682. ⟨10.1016/j.sse.2019.107682⟩. ⟨hal-02463250⟩