Elucidating 1S1R operation to reduce the read voltage margin variability by stack and programming conditions optimization

J Minguet Lopez (1) , L. Hudeley (1) , L. Grenouillet (1) , D Alfaro Robayo (1) , J. Sandrini (1) , G. Navarro , M. Bernard , C. Carabasse (1) , D. Deleruyelle (2) , N. Castellani , M. Bocquet , J. M Portal , E. Nowak , G. Molas

1 CEA-LETI - Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information
2 INL - DE - INL - Dispositifs Electroniques

1S1R operation behavior and read margin variability are elucidated for the first time to our knowledge. To this aim, an extensive experimental study is performed on HfO2 OxRAM technology co-integrated with GSSN-based Ovonic Threshold Selector (OTS) in 4kb memory arrays, supported by deep theoretical analysis. A semi-analytical dynamic model is developed for selector operation, describing OTS switching variability. The voltage repartition in the 1S1R stack during the switching operation is clarified. The 1S1R read voltage margin is quantified statistically, based on OTS switching voltage dispersion, OxRAM variability and margin degradation during endurance. Based on this theoretical and experimental study, 1S1R figures of merit (overall functionality, reliability, and maximum bank size) are optimized based on OTS and OxRAM devices' features and programming conditions.

Mots clés: chalcogenide; crossbar; OTS; operation variability; resistive RAM

Domaines: Sciences de l'ingénieur [physics]

J Minguet Lopez, L. Hudeley, L. Grenouillet, D Alfaro Robayo, J. Sandrini, et al.. Elucidating 1S1R operation to reduce the read voltage margin variability by stack and programming conditions optimization. 2021 IEEE International Reliability Physics Symposium (IRPS), Mar 2021, Monterey, United States. ⟨10.1109/IRPS46558.2021.9405195⟩. ⟨hal-03333678⟩